教程：在PYNQ-Z1或PYNQ-Z2上新增硬件设计，以AXI GPIO为例

本教程基于《Tutorial: Using a new hardware design with PYNQ (AXI GPIO)》编写。本教程有些地方与原文有出入，比如原文使用的板子是PYNQ-Z2，本文写的是PYNQ-Z1或者PYNQ-Z2，这是因为我使用PYNQ-Z1也完成了本实验。其他不一致的地方同理。

本教程将向您展示如何将上一篇教程中创建的Vivado硬件设计用于PYNQ。本教程是前一篇教程的后续，前一篇教程介绍了如何为PYNQ创建一个新的硬件设计。

环境说明

• 开发板：PYNQ-Z1或者PYNQ-Z2
• v2.4 PYNQ 镜像
• vivado 2018.2或者vivado2019.1

原文链接：https://discuss.pynq.io/t/tutorial-using-a-new-hardware-design-with-pynq-axi-gpio/146

相关资源：

• ipynb源文件：https://discuss.pynq.io/uploads/short-url/g8O85AMwDcYgspPkqDpG1cH4xWm.ipynb
• 硬件设计文件：https://discuss.pynq.io/uploads/short-url/gjwp4jNJzWGot5lJkeaT2mn8YGW.zip

1 使用pynq Overaly类将Overlay实例化。

Overlay类的原型为：Overlay(bitfile_name, download=True, ignore_version=False)

bitfile_name是FPGA位流文件的完整文件名。

• 默认情况下,download为True，当Overlay被实例化时，位流将被下载到PL。
• 也可以将download设置为False，以便在不下载比特流的情况下实例化Overlay。

Overlay类将自动为已知的IP分配一个驱动（如果可用）。每个PYNQ image都是用Vivado的一个版本来验证的。每个Vivado版本在IP目录中可能有不同版本的IP。PYNQ假定Vivado设计与经PYNQ image验证的Vivado版本相匹配。其他版本的Vivado可用于创建设计，但它们不被支持，也不保证它们能够工作。

设计中的任何IP的版本应该与为之编写的驱动程序的版本相同。Overlay类可以在分配驱动程序之前检查IP版本，也可以跳过版本检查。ignore_version可以被设置为True，以强制Overlay类在分配驱动前检查IP版本。

在没有PYNQ驱动的情况下，Overlay类会给一个IP分配一个默认的驱动（DefaultIP），为该IP的地址空间提供基本的MMIO（Memory mapping I/O，内存映射I/O）读写功能。这对于不需要完整的PYNQ驱动的简单IP来说很有用，或者对于新IP的原型设计来说也很有用。

!pwd

/home/xilinx/jupyter_notebooks/workspace

1.1 实例化Overlay

实例化前面教程中创建的设计。只指定了比特流，但Overlay类也会读取相应的.hwh或.tcl文件。如果这两个文件都没有提供，Overlay类将出现错误。

from pynq import Overlaytutorial = Overlay("../../hardware/pynq_tutorial_new_hardware_files_v2_4/pynq_tutorial_new_hardware.bit")

2 Check list of IP in the design

在使用设计之前，你需要知道有哪些IP可用。你可以根据你创建的Vivado设计来确定这一点。你需要记住确切的IP名称和层次结构。对于一个简单的设计，这是直接的，但对于一个较大的设计，这就变得比较复杂了。

可以通过查询覆盖层来确定可用的IP。

tutorial?

请注意，在Vivado中使用AXI GPIO IP的按钮、开关和LED已经被分配到pynq.lib.axigpio.AxiGPIO驱动。

BRAM被分配到pynq.Overlay.DefaultIP驱动。这是因为DefaultIP提供了对IP的MMIO访问。在BRAM这个内存的情况下，只需要MMIO来读写内存位置。

Overlay的IP信息也可以从 "ip_dict "中读取。这将打印出设计中的IP的完整列表，以及各种属性。这些信息来自于与Overlay一起提供的Hardware Hand-off文件（.hwh）。

tutorial.ip_dict

{'buttons': {'fullpath': 'buttons','type': 'xilinx.com:ip:axi_gpio:2.0','bdtype': None,'state': None,'addr_range': 65536,'phys_addr': 1092616192,'mem_id': 'S_AXI','memtype': 'REGISTER','gpio': {},'interrupts': {},'parameters': {'C_FAMILY': 'zynq','C_S_AXI_ADDR_WIDTH': '9','C_S_AXI_DATA_WIDTH': '32','C_GPIO_WIDTH': '4','C_GPIO2_WIDTH': '32','C_ALL_INPUTS': '1','C_ALL_INPUTS_2': '0','C_ALL_OUTPUTS': '0','C_ALL_OUTPUTS_2': '0','C_INTERRUPT_PRESENT': '0','C_DOUT_DEFAULT': '0x00000000','C_TRI_DEFAULT': '0xFFFFFFFF','C_IS_DUAL': '0','C_DOUT_DEFAULT_2': '0x00000000','C_TRI_DEFAULT_2': '0xFFFFFFFF','Component_Name': 'pynq_tutorial_axi_gpio_0_0','USE_BOARD_FLOW': 'true','GPIO_BOARD_INTERFACE': 'btns_4bits','GPIO2_BOARD_INTERFACE': 'Custom','EDK_IPTYPE': 'PERIPHERAL','C_BASEADDR': '0x41200000','C_HIGHADDR': '0x4120FFFF'},'registers': {'GPIO_DATA': {'address_offset': 0,'size': 4,'access': 'read-write','description': 'Channel-1 AXI GPIO Data register','fields': {'Channel-1 GPIO DATA': {'bit_offset': 0,'bit_width': 4,'description': 'Channel-1 AXI GPIO Data register','access': 'read-write'}}},'GPIO_TRI': {'address_offset': 4,'size': 4,'access': 'read-write','description': 'Channel-1 AXI GPIO 3-State Control register','fields': {'Channel-1 GPIO TRI': {'bit_offset': 0,'bit_width': 4,'description': 'Channel-1 AXI GPIO 3-State Control register','access': 'read-write'}}},'GPIO2_DATA': {'address_offset': 8,'size': 32,'access': 'read-write','description': 'Channel-2 AXI GPIO Data register','fields': {'Channel-2 GPIO DATA': {'bit_offset': 0,'bit_width': 32,'description': 'Channel-2 AXI GPIO Data register','access': 'read-write'}}},'GPIO2_TRI': {'address_offset': 12,'size': 32,'access': 'read-write','description': 'Channel-2 AXI GPIO 3-State Control register','fields': {'Channel-2 GPIO TRI': {'bit_offset': 0,'bit_width': 32,'description': 'Channel-2 AXI GPIO 3-State Control register','access': 'read-write'}}},'GIER': {'address_offset': 284,'size': 32,'access': 'read-write','description': 'Global Interrupt Enable register','fields': {'Global Interrupt Enable': {'bit_offset': 31,'bit_width': 1,'description': 'Global Interrupt Enable register','access': 'read-write'}}},'IP_IER': {'address_offset': 296,'size': 32,'access': 'read-write','description': 'IP Interrupt Enable register','fields': {'Channel-1 Interrupt Enable': {'bit_offset': 0,'bit_width': 1,'description': 'IP Interrupt Enable register','access': 'read-write'},'Channel-2 Interrupt Enable': {'bit_offset': 1,'bit_width': 1,'description': 'IP Interrupt Enable register','access': 'read-write'}}},'IP_ISR': {'address_offset': 288,'size': 32,'access': 'read-write','description': 'IP Interrupt Status register','fields': {'Channel-1 Interrupt Status': {'bit_offset': 0,'bit_width': 1,'description': 'IP Interrupt Status register','access': 'read-write'},'Channel-2 Interrupt Status': {'bit_offset': 1,'bit_width': 1,'description': 'IP Interrupt Status register','access': 'read-write'}}}},'device': ,'driver': pynq.lib.axigpio.AxiGPIO},'switches': {'fullpath': 'switches','type': 'xilinx.com:ip:axi_gpio:2.0','bdtype': None,'state': None,'addr_range': 65536,'phys_addr': 1092681728,'mem_id': 'S_AXI','memtype': 'REGISTER','gpio': {},'interrupts': {},'parameters': {'C_FAMILY': 'zynq','C_S_AXI_ADDR_WIDTH': '9','C_S_AXI_DATA_WIDTH': '32','C_GPIO_WIDTH': '2','C_GPIO2_WIDTH': '32','C_ALL_INPUTS': '1','C_ALL_INPUTS_2': '0','C_ALL_OUTPUTS': '0','C_ALL_OUTPUTS_2': '0','C_INTERRUPT_PRESENT': '0','C_DOUT_DEFAULT': '0x00000000','C_TRI_DEFAULT': '0xFFFFFFFF','C_IS_DUAL': '0','C_DOUT_DEFAULT_2': '0x00000000','C_TRI_DEFAULT_2': '0xFFFFFFFF','Component_Name': 'pynq_tutorial_axi_gpio_0_1','USE_BOARD_FLOW': 'true','GPIO_BOARD_INTERFACE': 'sws_2bits','GPIO2_BOARD_INTERFACE': 'Custom','EDK_IPTYPE': 'PERIPHERAL','C_BASEADDR': '0x41210000','C_HIGHADDR': '0x4121FFFF'},'registers': {'GPIO_DATA': {'address_offset': 0,'size': 2,'access': 'read-write','description': 'Channel-1 AXI GPIO Data register','fields': {'Channel-1 GPIO DATA': {'bit_offset': 0,'bit_width': 2,'description': 'Channel-1 AXI GPIO Data register','access': 'read-write'}}},'GPIO_TRI': {'address_offset': 4,'size': 2,'access': 'read-write','description': 'Channel-1 AXI GPIO 3-State Control register','fields': {'Channel-1 GPIO TRI': {'bit_offset': 0,'bit_width': 2,'description': 'Channel-1 AXI GPIO 3-State Control register','access': 'read-write'}}},'GPIO2_DATA': {'address_offset': 8,'size': 32,'access': 'read-write','description': 'Channel-2 AXI GPIO Data register','fields': {'Channel-2 GPIO DATA': {'bit_offset': 0,'bit_width': 32,'description': 'Channel-2 AXI GPIO Data register','access': 'read-write'}}},'GPIO2_TRI': {'address_offset': 12,'size': 32,'access': 'read-write','description': 'Channel-2 AXI GPIO 3-State Control register','fields': {'Channel-2 GPIO TRI': {'bit_offset': 0,'bit_width': 32,'description': 'Channel-2 AXI GPIO 3-State Control register','access': 'read-write'}}},'GIER': {'address_offset': 284,'size': 32,'access': 'read-write','description': 'Global Interrupt Enable register','fields': {'Global Interrupt Enable': {'bit_offset': 31,'bit_width': 1,'description': 'Global Interrupt Enable register','access': 'read-write'}}},'IP_IER': {'address_offset': 296,'size': 32,'access': 'read-write','description': 'IP Interrupt Enable register','fields': {'Channel-1 Interrupt Enable': {'bit_offset': 0,'bit_width': 1,'description': 'IP Interrupt Enable register','access': 'read-write'},'Channel-2 Interrupt Enable': {'bit_offset': 1,'bit_width': 1,'description': 'IP Interrupt Enable register','access': 'read-write'}}},'IP_ISR': {'address_offset': 288,'size': 32,'access': 'read-write','description': 'IP Interrupt Status register','fields': {'Channel-1 Interrupt Status': {'bit_offset': 0,'bit_width': 1,'description': 'IP Interrupt Status register','access': 'read-write'},'Channel-2 Interrupt Status': {'bit_offset': 1,'bit_width': 1,'description': 'IP Interrupt Status register','access': 'read-write'}}}},'device': ,'driver': pynq.lib.axigpio.AxiGPIO},'leds': {'fullpath': 'leds','type': 'xilinx.com:ip:axi_gpio:2.0','bdtype': None,'state': None,'addr_range': 65536,'phys_addr': 1092747264,'mem_id': 'S_AXI','memtype': 'REGISTER','gpio': {},'interrupts': {},'parameters': {'C_FAMILY': 'zynq','C_S_AXI_ADDR_WIDTH': '9','C_S_AXI_DATA_WIDTH': '32','C_GPIO_WIDTH': '4','C_GPIO2_WIDTH': '32','C_ALL_INPUTS': '0','C_ALL_INPUTS_2': '0','C_ALL_OUTPUTS': '0','C_ALL_OUTPUTS_2': '0','C_INTERRUPT_PRESENT': '0','C_DOUT_DEFAULT': '0x00000000','C_TRI_DEFAULT': '0xFFFFFFFF','C_IS_DUAL': '0','C_DOUT_DEFAULT_2': '0x00000000','C_TRI_DEFAULT_2': '0xFFFFFFFF','Component_Name': 'pynq_tutorial_axi_gpio_0_2','USE_BOARD_FLOW': 'true','GPIO_BOARD_INTERFACE': 'leds_4bits','GPIO2_BOARD_INTERFACE': 'Custom','EDK_IPTYPE': 'PERIPHERAL','C_BASEADDR': '0x41220000','C_HIGHADDR': '0x4122FFFF'},'registers': {'GPIO_DATA': {'address_offset': 0,'size': 4,'access': 'read-write','description': 'Channel-1 AXI GPIO Data register','fields': {'Channel-1 GPIO DATA': {'bit_offset': 0,'bit_width': 4,'description': 'Channel-1 AXI GPIO Data register','access': 'read-write'}}},'GPIO_TRI': {'address_offset': 4,'size': 4,'access': 'read-write','description': 'Channel-1 AXI GPIO 3-State Control register','fields': {'Channel-1 GPIO TRI': {'bit_offset': 0,'bit_width': 4,'description': 'Channel-1 AXI GPIO 3-State Control register','access': 'read-write'}}},'GPIO2_DATA': {'address_offset': 8,'size': 32,'access': 'read-write','description': 'Channel-2 AXI GPIO Data register','fields': {'Channel-2 GPIO DATA': {'bit_offset': 0,'bit_width': 32,'description': 'Channel-2 AXI GPIO Data register','access': 'read-write'}}},'GPIO2_TRI': {'address_offset': 12,'size': 32,'access': 'read-write','description': 'Channel-2 AXI GPIO 3-State Control register','fields': {'Channel-2 GPIO TRI': {'bit_offset': 0,'bit_width': 32,'description': 'Channel-2 AXI GPIO 3-State Control register','access': 'read-write'}}},'GIER': {'address_offset': 284,'size': 32,'access': 'read-write','description': 'Global Interrupt Enable register','fields': {'Global Interrupt Enable': {'bit_offset': 31,'bit_width': 1,'description': 'Global Interrupt Enable register','access': 'read-write'}}},'IP_IER': {'address_offset': 296,'size': 32,'access': 'read-write','description': 'IP Interrupt Enable register','fields': {'Channel-1 Interrupt Enable': {'bit_offset': 0,'bit_width': 1,'description': 'IP Interrupt Enable register','access': 'read-write'},'Channel-2 Interrupt Enable': {'bit_offset': 1,'bit_width': 1,'description': 'IP Interrupt Enable register','access': 'read-write'}}},'IP_ISR': {'address_offset': 288,'size': 32,'access': 'read-write','description': 'IP Interrupt Status register','fields': {'Channel-1 Interrupt Status': {'bit_offset': 0,'bit_width': 1,'description': 'IP Interrupt Status register','access': 'read-write'},'Channel-2 Interrupt Status': {'bit_offset': 1,'bit_width': 1,'description': 'IP Interrupt Status register','access': 'read-write'}}}},'device': ,'driver': pynq.lib.axigpio.AxiGPIO},'processing_system7_0': {'gpio': {},'interrupts': {},'parameters': {'C_EN_EMIO_PJTAG': '0','C_EN_EMIO_ENET0': '0','C_EN_EMIO_ENET1': '0','C_EN_EMIO_TRACE': '0','C_INCLUDE_TRACE_BUFFER': '0','C_TRACE_BUFFER_FIFO_SIZE': '128','USE_TRACE_DATA_EDGE_DETECTOR': '0','C_TRACE_PIPELINE_WIDTH': '8','C_TRACE_BUFFER_CLOCK_DELAY': '12','C_EMIO_GPIO_WIDTH': '64','C_INCLUDE_ACP_TRANS_CHECK': '0','C_USE_DEFAULT_ACP_USER_VAL': '0','C_S_AXI_ACP_ARUSER_VAL': '31','C_S_AXI_ACP_AWUSER_VAL': '31','C_M_AXI_GP0_ID_WIDTH': '12','C_M_AXI_GP0_ENABLE_STATIC_REMAP': '0','C_M_AXI_GP1_ID_WIDTH': '12','C_M_AXI_GP1_ENABLE_STATIC_REMAP': '0','C_S_AXI_GP0_ID_WIDTH': '6','C_S_AXI_GP1_ID_WIDTH': '6','C_S_AXI_ACP_ID_WIDTH': '3','C_S_AXI_HP0_ID_WIDTH': '6','C_S_AXI_HP0_DATA_WIDTH': '64','C_S_AXI_HP1_ID_WIDTH': '6','C_S_AXI_HP1_DATA_WIDTH': '64','C_S_AXI_HP2_ID_WIDTH': '6','C_S_AXI_HP2_DATA_WIDTH': '64','C_S_AXI_HP3_ID_WIDTH': '6','C_S_AXI_HP3_DATA_WIDTH': '64','C_M_AXI_GP0_THREAD_ID_WIDTH': '12','C_M_AXI_GP1_THREAD_ID_WIDTH': '12','C_NUM_F2P_INTR_INPUTS': '1','C_IRQ_F2P_MODE': 'DIRECT','C_DQ_WIDTH': '32','C_DQS_WIDTH': '4','C_DM_WIDTH': '4','C_MIO_PRIMITIVE': '54','C_TRACE_INTERNAL_WIDTH': '2','C_USE_AXI_NONSECURE': '0','C_USE_M_AXI_GP0': '1','C_USE_M_AXI_GP1': '0','C_USE_S_AXI_GP0': '0','C_USE_S_AXI_GP1': '0','C_USE_S_AXI_HP0': '0','C_USE_S_AXI_HP1': '0','C_USE_S_AXI_HP2': '0','C_USE_S_AXI_HP3': '0','C_USE_S_AXI_ACP': '0','C_PS7_SI_REV': 'PRODUCTION','C_FCLK_CLK0_BUF': 'TRUE','C_FCLK_CLK1_BUF': 'FALSE','C_FCLK_CLK2_BUF': 'FALSE','C_FCLK_CLK3_BUF': 'FALSE','C_PACKAGE_NAME': 'clg400','C_GP0_EN_MODIFIABLE_TXN': '1','C_GP1_EN_MODIFIABLE_TXN': '1','PCW_DDR_RAM_BASEADDR': '0x00100000','PCW_DDR_RAM_HIGHADDR': '0x1FFFFFFF','PCW_UART0_BASEADDR': '0xE0000000','PCW_UART0_HIGHADDR': '0xE0000FFF','PCW_UART1_BASEADDR': '0xE0001000','PCW_UART1_HIGHADDR': '0xE0001FFF','PCW_I2C0_BASEADDR': '0xE0004000','PCW_I2C0_HIGHADDR': '0xE0004FFF','PCW_I2C1_BASEADDR': '0xE0005000','PCW_I2C1_HIGHADDR': '0xE0005FFF','PCW_SPI0_BASEADDR': '0xE0006000','PCW_SPI0_HIGHADDR': '0xE0006FFF','PCW_SPI1_BASEADDR': '0xE0007000','PCW_SPI1_HIGHADDR': '0xE0007FFF','PCW_CAN0_BASEADDR': '0xE0008000','PCW_CAN0_HIGHADDR': '0xE0008FFF','PCW_CAN1_BASEADDR': '0xE0009000','PCW_CAN1_HIGHADDR': '0xE0009FFF','PCW_GPIO_BASEADDR': '0xE000A000','PCW_GPIO_HIGHADDR': '0xE000AFFF','PCW_ENET0_BASEADDR': '0xE000B000','PCW_ENET0_HIGHADDR': '0xE000BFFF','PCW_ENET1_BASEADDR': '0xE000C000','PCW_ENET1_HIGHADDR': '0xE000CFFF','PCW_SDIO0_BASEADDR': '0xE0100000','PCW_SDIO0_HIGHADDR': '0xE0100FFF','PCW_SDIO1_BASEADDR': '0xE0101000','PCW_SDIO1_HIGHADDR': '0xE0101FFF','PCW_USB0_BASEADDR': '0xE0102000','PCW_USB0_HIGHADDR': '0xE0102fff','PCW_USB1_BASEADDR': '0xE0103000','PCW_USB1_HIGHADDR': '0xE0103fff','PCW_TTC0_BASEADDR': '0xE0104000','PCW_TTC0_HIGHADDR': '0xE0104fff','PCW_TTC1_BASEADDR': '0xE0105000','PCW_TTC1_HIGHADDR': '0xE0105fff','PCW_FCLK_CLK0_BUF': 'TRUE','PCW_FCLK_CLK1_BUF': 'FALSE','PCW_FCLK_CLK2_BUF': 'FALSE','PCW_FCLK_CLK3_BUF': 'FALSE','PCW_UIPARAM_DDR_FREQ_MHZ': '525','PCW_UIPARAM_DDR_BANK_ADDR_COUNT': '3','PCW_UIPARAM_DDR_ROW_ADDR_COUNT': '15','PCW_UIPARAM_DDR_COL_ADDR_COUNT': '10','PCW_UIPARAM_DDR_CL': '7','PCW_UIPARAM_DDR_CWL': '6','PCW_UIPARAM_DDR_T_RCD': '7','PCW_UIPARAM_DDR_T_RP': '7','PCW_UIPARAM_DDR_T_RC': '48.91','PCW_UIPARAM_DDR_T_RAS_MIN': '35.0','PCW_UIPARAM_DDR_T_FAW': '40.0','PCW_UIPARAM_DDR_AL': '0','PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0': '-0.051','PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1': '-0.006','PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2': '-0.009','PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3': '-0.033','PCW_UIPARAM_DDR_BOARD_DELAY0': '0.279','PCW_UIPARAM_DDR_BOARD_DELAY1': '0.260','PCW_UIPARAM_DDR_BOARD_DELAY2': '0.085','PCW_UIPARAM_DDR_BOARD_DELAY3': '0.092','PCW_UIPARAM_DDR_DQS_0_LENGTH_MM': '32.14','PCW_UIPARAM_DDR_DQS_1_LENGTH_MM': '31.12','PCW_UIPARAM_DDR_DQS_2_LENGTH_MM': '0','PCW_UIPARAM_DDR_DQS_3_LENGTH_MM': '0','PCW_UIPARAM_DDR_DQ_0_LENGTH_MM': '32.2','PCW_UIPARAM_DDR_DQ_1_LENGTH_MM': '31.08','PCW_UIPARAM_DDR_DQ_2_LENGTH_MM': '0','PCW_UIPARAM_DDR_DQ_3_LENGTH_MM': '0','PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM': '27.95','PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM': '27.95','PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM': '0','PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM': '0','PCW_UIPARAM_DDR_DQS_0_PACKAGE_LENGTH': '105.056','PCW_UIPARAM_DDR_DQS_1_PACKAGE_LENGTH': '66.904','PCW_UIPARAM_DDR_DQS_2_PACKAGE_LENGTH': '89.1715','PCW_UIPARAM_DDR_DQS_3_PACKAGE_LENGTH': '113.63','PCW_UIPARAM_DDR_DQ_0_PACKAGE_LENGTH': '98.503','PCW_UIPARAM_DDR_DQ_1_PACKAGE_LENGTH': '68.5855','PCW_UIPARAM_DDR_DQ_2_PACKAGE_LENGTH': '90.295','PCW_UIPARAM_DDR_DQ_3_PACKAGE_LENGTH': '103.977','PCW_UIPARAM_DDR_CLOCK_0_PACKAGE_LENGTH': '80.4535','PCW_UIPARAM_DDR_CLOCK_1_PACKAGE_LENGTH': '80.4535','PCW_UIPARAM_DDR_CLOCK_2_PACKAGE_LENGTH': '80.4535','PCW_UIPARAM_DDR_CLOCK_3_PACKAGE_LENGTH': '80.4535','PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY': '160','PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY': '160','PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0': '-0.051','PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1': '-0.006','PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2': '-0.009','PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3': '-0.033','PCW_PACKAGE_DDR_BOARD_DELAY0': '0.279','PCW_PACKAGE_DDR_BOARD_DELAY1': '0.260','PCW_PACKAGE_DDR_BOARD_DELAY2': '0.085','PCW_PACKAGE_DDR_BOARD_DELAY3': '0.092','PCW_CPU_CPU_6X4X_MAX_RANGE': '667','PCW_CRYSTAL_PERIPHERAL_FREQMHZ': '50','PCW_APU_PERIPHERAL_FREQMHZ': '650','PCW_DCI_PERIPHERAL_FREQMHZ': '10.159','PCW_QSPI_PERIPHERAL_FREQMHZ': '200','PCW_SMC_PERIPHERAL_FREQMHZ': '100','PCW_USB0_PERIPHERAL_FREQMHZ': '60','PCW_USB1_PERIPHERAL_FREQMHZ': '60','PCW_SDIO_PERIPHERAL_FREQMHZ': '50','PCW_UART_PERIPHERAL_FREQMHZ': '100','PCW_SPI_PERIPHERAL_FREQMHZ': '166.666666','PCW_CAN_PERIPHERAL_FREQMHZ': '100','PCW_CAN0_PERIPHERAL_FREQMHZ': '-1','PCW_CAN1_PERIPHERAL_FREQMHZ': '-1','PCW_I2C_PERIPHERAL_FREQMHZ': '25','PCW_WDT_PERIPHERAL_FREQMHZ': '133.333333','PCW_TTC_PERIPHERAL_FREQMHZ': '50','PCW_TTC0_CLK0_PERIPHERAL_FREQMHZ': '133.333333','PCW_TTC0_CLK1_PERIPHERAL_FREQMHZ': '133.333333','PCW_TTC0_CLK2_PERIPHERAL_FREQMHZ': '133.333333','PCW_TTC1_CLK0_PERIPHERAL_FREQMHZ': '133.333333','PCW_TTC1_CLK1_PERIPHERAL_FREQMHZ': '133.333333','PCW_TTC1_CLK2_PERIPHERAL_FREQMHZ': '133.333333','PCW_PCAP_PERIPHERAL_FREQMHZ': '200','PCW_TPIU_PERIPHERAL_FREQMHZ': '200','PCW_FPGA0_PERIPHERAL_FREQMHZ': '100','PCW_FPGA1_PERIPHERAL_FREQMHZ': '50','PCW_FPGA2_PERIPHERAL_FREQMHZ': '50','PCW_FPGA3_PERIPHERAL_FREQMHZ': '50','PCW_ACT_APU_PERIPHERAL_FREQMHZ': '650.000000','PCW_UIPARAM_ACT_DDR_FREQ_MHZ': '525.000000','PCW_ACT_DCI_PERIPHERAL_FREQMHZ': '10.096154','PCW_ACT_QSPI_PERIPHERAL_FREQMHZ': '200.000000','PCW_ACT_SMC_PERIPHERAL_FREQMHZ': '10.000000','PCW_ACT_ENET0_PERIPHERAL_FREQMHZ': '125.000000','PCW_ACT_ENET1_PERIPHERAL_FREQMHZ': '10.000000','PCW_ACT_USB0_PERIPHERAL_FREQMHZ': '60','PCW_ACT_USB1_PERIPHERAL_FREQMHZ': '60','PCW_ACT_SDIO_PERIPHERAL_FREQMHZ': '50.000000','PCW_ACT_UART_PERIPHERAL_FREQMHZ': '100.000000','PCW_ACT_SPI_PERIPHERAL_FREQMHZ': '10.000000','PCW_ACT_CAN_PERIPHERAL_FREQMHZ': '10.000000','PCW_ACT_CAN0_PERIPHERAL_FREQMHZ': '23.8095','PCW_ACT_CAN1_PERIPHERAL_FREQMHZ': '23.8095','PCW_ACT_I2C_PERIPHERAL_FREQMHZ': '50','PCW_ACT_WDT_PERIPHERAL_FREQMHZ': '108.333336','PCW_ACT_TTC_PERIPHERAL_FREQMHZ': '50','PCW_ACT_PCAP_PERIPHERAL_FREQMHZ': '200.000000','PCW_ACT_TPIU_PERIPHERAL_FREQMHZ': '200.000000','PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ': '100.000000','PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ': '10.000000','PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ': '10.000000','PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ': '10.000000','PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ': '108.333336','PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ': '108.333336','PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ': '108.333336','PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ': '108.333336','PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ': '108.333336','PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ': '108.333336','PCW_CLK0_FREQ': '100000000','PCW_CLK1_FREQ': '10000000','PCW_CLK2_FREQ': '10000000','PCW_CLK3_FREQ': '10000000','PCW_OVERRIDE_BASIC_CLOCK': '0','PCW_CPU_PERIPHERAL_DIVISOR0': '2','PCW_DDR_PERIPHERAL_DIVISOR0': '2','PCW_SMC_PERIPHERAL_DIVISOR0': '1','PCW_QSPI_PERIPHERAL_DIVISOR0': '5','PCW_SDIO_PERIPHERAL_DIVISOR0': '20','PCW_UART_PERIPHERAL_DIVISOR0': '10','PCW_SPI_PERIPHERAL_DIVISOR0': '1','PCW_CAN_PERIPHERAL_DIVISOR0': '1','PCW_CAN_PERIPHERAL_DIVISOR1': '1','PCW_FCLK0_PERIPHERAL_DIVISOR0': '5','PCW_FCLK1_PERIPHERAL_DIVISOR0': '1','PCW_FCLK2_PERIPHERAL_DIVISOR0': '1','PCW_FCLK3_PERIPHERAL_DIVISOR0': '1','PCW_FCLK0_PERIPHERAL_DIVISOR1': '2','PCW_FCLK1_PERIPHERAL_DIVISOR1': '1','PCW_FCLK2_PERIPHERAL_DIVISOR1': '1','PCW_FCLK3_PERIPHERAL_DIVISOR1': '1','PCW_ENET0_PERIPHERAL_DIVISOR0': '8','PCW_ENET1_PERIPHERAL_DIVISOR0': '1','PCW_ENET0_PERIPHERAL_DIVISOR1': '1','PCW_ENET1_PERIPHERAL_DIVISOR1': '1','PCW_TPIU_PERIPHERAL_DIVISOR0': '1','PCW_DCI_PERIPHERAL_DIVISOR0': '52','PCW_DCI_PERIPHERAL_DIVISOR1': '2','PCW_PCAP_PERIPHERAL_DIVISOR0': '5','PCW_TTC0_CLK0_PERIPHERAL_DIVISOR0': '1','PCW_TTC0_CLK1_PERIPHERAL_DIVISOR0': '1','PCW_TTC0_CLK2_PERIPHERAL_DIVISOR0': '1','PCW_TTC1_CLK0_PERIPHERAL_DIVISOR0': '1','PCW_TTC1_CLK1_PERIPHERAL_DIVISOR0': '1','PCW_TTC1_CLK2_PERIPHERAL_DIVISOR0': '1','PCW_WDT_PERIPHERAL_DIVISOR0': '1','PCW_ARMPLL_CTRL_FBDIV': '26','PCW_IOPLL_CTRL_FBDIV': '20','PCW_DDRPLL_CTRL_FBDIV': '21','PCW_CPU_CPU_PLL_FREQMHZ': '1300.000','PCW_IO_IO_PLL_FREQMHZ': '1000.000','PCW_DDR_DDR_PLL_FREQMHZ': '1050.000','PCW_SMC_PERIPHERAL_VALID': '0','PCW_SDIO_PERIPHERAL_VALID': '1','PCW_SPI_PERIPHERAL_VALID': '0','PCW_CAN_PERIPHERAL_VALID': '0','PCW_UART_PERIPHERAL_VALID': '1','PCW_EN_EMIO_CAN0': '0','PCW_EN_EMIO_CAN1': '0','PCW_EN_EMIO_ENET0': '0','PCW_EN_EMIO_ENET1': '0','PCW_EN_PTP_ENET0': '0','PCW_EN_PTP_ENET1': '0','PCW_EN_EMIO_GPIO': '0','PCW_EN_EMIO_I2C0': '0','PCW_EN_EMIO_I2C1': '0','PCW_EN_EMIO_PJTAG': '0','PCW_EN_EMIO_SDIO0': '0','PCW_EN_EMIO_CD_SDIO0': '0','PCW_EN_EMIO_WP_SDIO0': '0','PCW_EN_EMIO_SDIO1': '0','PCW_EN_EMIO_CD_SDIO1': '0','PCW_EN_EMIO_WP_SDIO1': '0','PCW_EN_EMIO_SPI0': '0','PCW_EN_EMIO_SPI1': '0','PCW_EN_EMIO_UART0': '0','PCW_EN_EMIO_UART1': '0','PCW_EN_EMIO_MODEM_UART0': '0','PCW_EN_EMIO_MODEM_UART1': '0','PCW_EN_EMIO_TTC0': '0','PCW_EN_EMIO_TTC1': '0','PCW_EN_EMIO_WDT': '0','PCW_EN_EMIO_TRACE': '0','PCW_USE_AXI_NONSECURE': '0','PCW_USE_M_AXI_GP0': '1','PCW_USE_M_AXI_GP1': '0','PCW_USE_S_AXI_GP0': '0','PCW_USE_S_AXI_GP1': '0','PCW_USE_S_AXI_ACP': '0','PCW_USE_S_AXI_HP0': '0','PCW_USE_S_AXI_HP1': '0','PCW_USE_S_AXI_HP2': '0','PCW_USE_S_AXI_HP3': '0','PCW_M_AXI_GP0_FREQMHZ': '10','PCW_M_AXI_GP1_FREQMHZ': '10','PCW_S_AXI_GP0_FREQMHZ': '10','PCW_S_AXI_GP1_FREQMHZ': '10','PCW_S_AXI_ACP_FREQMHZ': '10','PCW_S_AXI_HP0_FREQMHZ': '10','PCW_S_AXI_HP1_FREQMHZ': '10','PCW_S_AXI_HP2_FREQMHZ': '10','PCW_S_AXI_HP3_FREQMHZ': '10','PCW_USE_DMA0': '0','PCW_USE_DMA1': '0','PCW_USE_DMA2': '0','PCW_USE_DMA3': '0','PCW_USE_TRACE': '0','PCW_TRACE_PIPELINE_WIDTH': '8','PCW_INCLUDE_TRACE_BUFFER': '0','PCW_TRACE_BUFFER_FIFO_SIZE': '128','PCW_USE_TRACE_DATA_EDGE_DETECTOR': '0','PCW_TRACE_BUFFER_CLOCK_DELAY': '12','PCW_USE_CROSS_TRIGGER': '0','PCW_FTM_CTI_IN0': '','PCW_FTM_CTI_IN1': '','PCW_FTM_CTI_IN2': '','PCW_FTM_CTI_IN3': '','PCW_FTM_CTI_OUT0': '','PCW_FTM_CTI_OUT1': '','PCW_FTM_CTI_OUT2': '','PCW_FTM_CTI_OUT3': '','PCW_USE_DEBUG': '0','PCW_USE_CR_FABRIC': '1','PCW_USE_AXI_FABRIC_IDLE': '0','PCW_USE_DDR_BYPASS': '0','PCW_USE_FABRIC_INTERRUPT': '0','PCW_USE_PROC_EVENT_BUS': '0','PCW_USE_EXPANDED_IOP': '0','PCW_USE_HIGH_OCM': '0','PCW_USE_PS_SLCR_REGISTERS': '0','PCW_USE_EXPANDED_PS_SLCR_REGISTERS': '0','PCW_USE_CORESIGHT': '0','PCW_EN_EMIO_SRAM_INT': '0','PCW_GPIO_EMIO_GPIO_WIDTH': '64','PCW_GP0_NUM_WRITE_THREADS': '4','PCW_GP0_NUM_READ_THREADS': '4','PCW_GP1_NUM_WRITE_THREADS': '4','PCW_GP1_NUM_READ_THREADS': '4','PCW_UART0_BAUD_RATE': '115200','PCW_UART1_BAUD_RATE': '115200','PCW_EN_4K_TIMER': '0','PCW_M_AXI_GP0_ID_WIDTH': '12','PCW_M_AXI_GP0_ENABLE_STATIC_REMAP': '0','PCW_M_AXI_GP0_SUPPORT_NARROW_BURST': '0','PCW_M_AXI_GP0_THREAD_ID_WIDTH': '12','PCW_M_AXI_GP1_ID_WIDTH': '12','PCW_M_AXI_GP1_ENABLE_STATIC_REMAP': '0','PCW_M_AXI_GP1_SUPPORT_NARROW_BURST': '0','PCW_M_AXI_GP1_THREAD_ID_WIDTH': '12','PCW_S_AXI_GP0_ID_WIDTH': '6','PCW_S_AXI_GP1_ID_WIDTH': '6','PCW_S_AXI_ACP_ID_WIDTH': '3','PCW_INCLUDE_ACP_TRANS_CHECK': '0','PCW_USE_DEFAULT_ACP_USER_VAL': '0','PCW_S_AXI_ACP_ARUSER_VAL': '31','PCW_S_AXI_ACP_AWUSER_VAL': '31','PCW_S_AXI_HP0_ID_WIDTH': '6','PCW_S_AXI_HP0_DATA_WIDTH': '64','PCW_S_AXI_HP1_ID_WIDTH': '6','PCW_S_AXI_HP1_DATA_WIDTH': '64','PCW_S_AXI_HP2_ID_WIDTH': '6','PCW_S_AXI_HP2_DATA_WIDTH': '64','PCW_S_AXI_HP3_ID_WIDTH': '6','PCW_S_AXI_HP3_DATA_WIDTH': '64','PCW_NUM_F2P_INTR_INPUTS': '1','PCW_EN_DDR': '1','PCW_EN_SMC': '0','PCW_EN_QSPI': '1','PCW_EN_CAN0': '0','PCW_EN_CAN1': '0','PCW_EN_ENET0': '1','PCW_EN_ENET1': '0','PCW_EN_GPIO': '1','PCW_EN_I2C0': '0','PCW_EN_I2C1': '0','PCW_EN_PJTAG': '0','PCW_EN_SDIO0': '1','PCW_EN_SDIO1': '0','PCW_EN_SPI0': '0','PCW_EN_SPI1': '0','PCW_EN_UART0': '1','PCW_EN_UART1': '0','PCW_EN_MODEM_UART0': '0','PCW_EN_MODEM_UART1': '0','PCW_EN_TTC0': '0','PCW_EN_TTC1': '0','PCW_EN_WDT': '0','PCW_EN_TRACE': '0','PCW_EN_USB0': '1','PCW_EN_USB1': '0','PCW_DQ_WIDTH': '32','PCW_DQS_WIDTH': '4','PCW_DM_WIDTH': '4','PCW_MIO_PRIMITIVE': '54','PCW_EN_CLK0_PORT': '1','PCW_EN_CLK1_PORT': '0','PCW_EN_CLK2_PORT': '0','PCW_EN_CLK3_PORT': '0','PCW_EN_RST0_PORT': '1','PCW_EN_RST1_PORT': '0','PCW_EN_RST2_PORT': '0','PCW_EN_RST3_PORT': '0','PCW_EN_CLKTRIG0_PORT': '0','PCW_EN_CLKTRIG1_PORT': '0','PCW_EN_CLKTRIG2_PORT': '0','PCW_EN_CLKTRIG3_PORT': '0','PCW_P2F_DMAC_ABORT_INTR': '0','PCW_P2F_DMAC0_INTR': '0','PCW_P2F_DMAC1_INTR': '0','PCW_P2F_DMAC2_INTR': '0','PCW_P2F_DMAC3_INTR': '0','PCW_P2F_DMAC4_INTR': '0','PCW_P2F_DMAC5_INTR': '0','PCW_P2F_DMAC6_INTR': '0','PCW_P2F_DMAC7_INTR': '0','PCW_P2F_SMC_INTR': '0','PCW_P2F_QSPI_INTR': '0','PCW_P2F_CTI_INTR': '0','PCW_P2F_GPIO_INTR': '0','PCW_P2F_USB0_INTR': '0','PCW_P2F_ENET0_INTR': '0','PCW_P2F_SDIO0_INTR': '0','PCW_P2F_I2C0_INTR': '0','PCW_P2F_SPI0_INTR': '0','PCW_P2F_UART0_INTR': '0','PCW_P2F_CAN0_INTR': '0','PCW_P2F_USB1_INTR': '0','PCW_P2F_ENET1_INTR': '0','PCW_P2F_SDIO1_INTR': '0','PCW_P2F_I2C1_INTR': '0','PCW_P2F_SPI1_INTR': '0','PCW_P2F_UART1_INTR': '0','PCW_P2F_CAN1_INTR': '0','PCW_IRQ_F2P_INTR': '0','PCW_IRQ_F2P_MODE': 'DIRECT','PCW_CORE0_FIQ_INTR': '0','PCW_CORE0_IRQ_INTR': '0','PCW_CORE1_FIQ_INTR': '0','PCW_CORE1_IRQ_INTR': '0','PCW_VALUE_SILVERSION': '3','PCW_GP0_EN_MODIFIABLE_TXN': '1','PCW_GP1_EN_MODIFIABLE_TXN': '1','PCW_IMPORT_BOARD_PRESET': 'None','PCW_PERIPHERAL_BOARD_PRESET': 'None','PCW_PRESET_BANK0_VOLTAGE': 'LVCMOS 3.3V','PCW_PRESET_BANK1_VOLTAGE': 'LVCMOS 1.8V','PCW_UIPARAM_DDR_ENABLE': '1','PCW_UIPARAM_DDR_ADV_ENABLE': '0','PCW_UIPARAM_DDR_MEMORY_TYPE': 'DDR 3','PCW_UIPARAM_DDR_ECC': 'Disabled','PCW_UIPARAM_DDR_BUS_WIDTH': '16 Bit','PCW_UIPARAM_DDR_BL': '8','PCW_UIPARAM_DDR_HIGH_TEMP': 'Normal (0-85)','PCW_UIPARAM_DDR_PARTNO': 'MT41J256M16 RE-125','PCW_UIPARAM_DDR_DRAM_WIDTH': '16 Bits','PCW_UIPARAM_DDR_DEVICE_CAPACITY': '4096 MBits','PCW_UIPARAM_DDR_SPEED_BIN': 'DDR3_1066F','PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL': '1','PCW_UIPARAM_DDR_TRAIN_READ_GATE': '1','PCW_UIPARAM_DDR_TRAIN_DATA_EYE': '1','PCW_UIPARAM_DDR_CLOCK_STOP_EN': '0','PCW_UIPARAM_DDR_USE_INTERNAL_VREF': '0','PCW_DDR_PRIORITY_WRITEPORT_0': '','PCW_DDR_PRIORITY_WRITEPORT_1': '','PCW_DDR_PRIORITY_WRITEPORT_2': '','PCW_DDR_PRIORITY_WRITEPORT_3': '','PCW_DDR_PRIORITY_READPORT_0': '','PCW_DDR_PRIORITY_READPORT_1': '','PCW_DDR_PRIORITY_READPORT_2': '','PCW_DDR_PRIORITY_READPORT_3': '','PCW_DDR_PORT0_HPR_ENABLE': '0','PCW_DDR_PORT1_HPR_ENABLE': '0','PCW_DDR_PORT2_HPR_ENABLE': '0','PCW_DDR_PORT3_HPR_ENABLE': '0','PCW_DDR_HPRLPR_QUEUE_PARTITION': 'HPR(0)/LPR(32)','PCW_DDR_LPR_TO_CRITICAL_PRIORITY_LEVEL': '2','PCW_DDR_HPR_TO_CRITICAL_PRIORITY_LEVEL': '15','PCW_DDR_WRITE_TO_CRITICAL_PRIORITY_LEVEL': '2','PCW_NAND_PERIPHERAL_ENABLE': '0','PCW_NAND_NAND_IO': '','PCW_NAND_GRP_D8_ENABLE': '0','PCW_NAND_GRP_D8_IO': '','PCW_NOR_PERIPHERAL_ENABLE': '0','PCW_NOR_NOR_IO': '','PCW_NOR_GRP_A25_ENABLE': '0','PCW_NOR_GRP_A25_IO': '','PCW_NOR_GRP_CS0_ENABLE': '0','PCW_NOR_GRP_CS0_IO': '','PCW_NOR_GRP_SRAM_CS0_ENABLE': '0','PCW_NOR_GRP_SRAM_CS0_IO': '','PCW_NOR_GRP_CS1_ENABLE': '0','PCW_NOR_GRP_CS1_IO': '','PCW_NOR_GRP_SRAM_CS1_ENABLE': '0','PCW_NOR_GRP_SRAM_CS1_IO': '','PCW_NOR_GRP_SRAM_INT_ENABLE': '0','PCW_NOR_GRP_SRAM_INT_IO': '','PCW_QSPI_PERIPHERAL_ENABLE': '1','PCW_QSPI_QSPI_IO': 'MIO 1 .. 6','PCW_QSPI_GRP_SINGLE_SS_ENABLE': '1','PCW_QSPI_GRP_SINGLE_SS_IO': 'MIO 1 .. 6','PCW_QSPI_GRP_SS1_ENABLE': '0','PCW_QSPI_GRP_SS1_IO': '','PCW_SINGLE_QSPI_DATA_MODE': 'x4','PCW_DUAL_STACK_QSPI_DATA_MODE': '','PCW_DUAL_PARALLEL_QSPI_DATA_MODE': '','PCW_QSPI_GRP_IO1_ENABLE': '0','PCW_QSPI_GRP_IO1_IO': '','PCW_QSPI_GRP_FBCLK_ENABLE': '1','PCW_QSPI_GRP_FBCLK_IO': 'MIO 8','PCW_QSPI_INTERNAL_HIGHADDRESS': '0xFCFFFFFF','PCW_ENET0_PERIPHERAL_ENABLE': '1','PCW_ENET0_ENET0_IO': 'MIO 16 .. 27','PCW_ENET0_GRP_MDIO_ENABLE': '1','PCW_ENET0_GRP_MDIO_IO': 'MIO 52 .. 53','PCW_ENET_RESET_ENABLE': '1','PCW_ENET_RESET_SELECT': 'Share reset pin','PCW_ENET0_RESET_ENABLE': '1','PCW_ENET0_RESET_IO': 'MIO 9','PCW_ENET1_PERIPHERAL_ENABLE': '0','PCW_ENET1_ENET1_IO': '','PCW_ENET1_GRP_MDIO_ENABLE': '0','PCW_ENET1_GRP_MDIO_IO': '','PCW_ENET1_RESET_ENABLE': '0','PCW_ENET1_RESET_IO': '','PCW_SD0_PERIPHERAL_ENABLE': '1','PCW_SD0_SD0_IO': 'MIO 40 .. 45','PCW_SD0_GRP_CD_ENABLE': '1','PCW_SD0_GRP_CD_IO': 'MIO 47','PCW_SD0_GRP_WP_ENABLE': '0','PCW_SD0_GRP_WP_IO': '','PCW_SD0_GRP_POW_ENABLE': '0','PCW_SD0_GRP_POW_IO': '','PCW_SD1_PERIPHERAL_ENABLE': '0','PCW_SD1_SD1_IO': '','PCW_SD1_GRP_CD_ENABLE': '0','PCW_SD1_GRP_CD_IO': '','PCW_SD1_GRP_WP_ENABLE': '0','PCW_SD1_GRP_WP_IO': '','PCW_SD1_GRP_POW_ENABLE': '0','PCW_SD1_GRP_POW_IO': '','PCW_UART0_PERIPHERAL_ENABLE': '1','PCW_UART0_UART0_IO': 'MIO 14 .. 15','PCW_UART0_GRP_FULL_ENABLE': '0','PCW_UART0_GRP_FULL_IO': '','PCW_UART1_PERIPHERAL_ENABLE': '0','PCW_UART1_UART1_IO': '','PCW_UART1_GRP_FULL_ENABLE': '0','PCW_UART1_GRP_FULL_IO': '','PCW_SPI0_PERIPHERAL_ENABLE': '0','PCW_SPI0_SPI0_IO': '','PCW_SPI0_GRP_SS0_ENABLE': '0','PCW_SPI0_GRP_SS0_IO': '','PCW_SPI0_GRP_SS1_ENABLE': '0','PCW_SPI0_GRP_SS1_IO': '','PCW_SPI0_GRP_SS2_ENABLE': '0','PCW_SPI0_GRP_SS2_IO': '','PCW_SPI1_PERIPHERAL_ENABLE': '0','PCW_SPI1_SPI1_IO': '','PCW_SPI1_GRP_SS0_ENABLE': '0','PCW_SPI1_GRP_SS0_IO': '','PCW_SPI1_GRP_SS1_ENABLE': '0','PCW_SPI1_GRP_SS1_IO': '','PCW_SPI1_GRP_SS2_ENABLE': '0','PCW_SPI1_GRP_SS2_IO': '','PCW_CAN0_PERIPHERAL_ENABLE': '0','PCW_CAN0_CAN0_IO': '','PCW_CAN0_GRP_CLK_ENABLE': '0','PCW_CAN0_GRP_CLK_IO': '','PCW_CAN1_PERIPHERAL_ENABLE': '0','PCW_CAN1_CAN1_IO': '','PCW_CAN1_GRP_CLK_ENABLE': '0','PCW_CAN1_GRP_CLK_IO': '','PCW_TRACE_PERIPHERAL_ENABLE': '0','PCW_TRACE_TRACE_IO': '','PCW_TRACE_GRP_2BIT_ENABLE': '0','PCW_TRACE_GRP_2BIT_IO': '','PCW_TRACE_GRP_4BIT_ENABLE': '0','PCW_TRACE_GRP_4BIT_IO': '','PCW_TRACE_GRP_8BIT_ENABLE': '0','PCW_TRACE_GRP_8BIT_IO': '','PCW_TRACE_GRP_16BIT_ENABLE': '0','PCW_TRACE_GRP_16BIT_IO': '','PCW_TRACE_GRP_32BIT_ENABLE': '0','PCW_TRACE_GRP_32BIT_IO': '','PCW_TRACE_INTERNAL_WIDTH': '2','PCW_WDT_PERIPHERAL_ENABLE': '0','PCW_WDT_WDT_IO': '','PCW_TTC0_PERIPHERAL_ENABLE': '0','PCW_TTC0_TTC0_IO': '','PCW_TTC1_PERIPHERAL_ENABLE': '0','PCW_TTC1_TTC1_IO': '','PCW_PJTAG_PERIPHERAL_ENABLE': '0','PCW_PJTAG_PJTAG_IO': '','PCW_USB0_PERIPHERAL_ENABLE': '1','PCW_USB0_USB0_IO': 'MIO 28 .. 39','PCW_USB_RESET_ENABLE': '1','PCW_USB_RESET_SELECT': 'Share reset pin','PCW_USB0_RESET_ENABLE': '1','PCW_USB0_RESET_IO': 'MIO 46','PCW_USB1_PERIPHERAL_ENABLE': '0','PCW_USB1_USB1_IO': '','PCW_USB1_RESET_ENABLE': '0','PCW_USB1_RESET_IO': '','PCW_I2C0_PERIPHERAL_ENABLE': '0','PCW_I2C0_I2C0_IO': '','PCW_I2C0_GRP_INT_ENABLE': '0','PCW_I2C0_GRP_INT_IO': '','PCW_I2C0_RESET_ENABLE': '0','PCW_I2C0_RESET_IO': '','PCW_I2C1_PERIPHERAL_ENABLE': '0','PCW_I2C1_I2C1_IO': '','PCW_I2C1_GRP_INT_ENABLE': '0','PCW_I2C1_GRP_INT_IO': '','PCW_I2C_RESET_ENABLE': '1','PCW_I2C_RESET_SELECT': '','PCW_I2C1_RESET_ENABLE': '0','PCW_I2C1_RESET_IO': '','PCW_GPIO_PERIPHERAL_ENABLE': '0','PCW_GPIO_MIO_GPIO_ENABLE': '1','PCW_GPIO_MIO_GPIO_IO': 'MIO','PCW_GPIO_EMIO_GPIO_ENABLE': '0','PCW_GPIO_EMIO_GPIO_IO': '','PCW_APU_CLK_RATIO_ENABLE': '6:2:1','PCW_ENET0_PERIPHERAL_FREQMHZ': '1000 Mbps','PCW_ENET1_PERIPHERAL_FREQMHZ': '1000 Mbps','PCW_CPU_PERIPHERAL_CLKSRC': 'ARM PLL','PCW_DDR_PERIPHERAL_CLKSRC': 'DDR PLL','PCW_SMC_PERIPHERAL_CLKSRC': 'IO PLL','PCW_QSPI_PERIPHERAL_CLKSRC': 'IO PLL','PCW_SDIO_PERIPHERAL_CLKSRC': 'IO PLL','PCW_UART_PERIPHERAL_CLKSRC': 'IO PLL','PCW_SPI_PERIPHERAL_CLKSRC': 'IO PLL','PCW_CAN_PERIPHERAL_CLKSRC': 'IO PLL','PCW_FCLK0_PERIPHERAL_CLKSRC': 'IO PLL','PCW_FCLK1_PERIPHERAL_CLKSRC': 'IO PLL','PCW_FCLK2_PERIPHERAL_CLKSRC': 'IO PLL','PCW_FCLK3_PERIPHERAL_CLKSRC': 'IO PLL','PCW_ENET0_PERIPHERAL_CLKSRC': 'IO PLL','PCW_ENET1_PERIPHERAL_CLKSRC': 'IO PLL','PCW_CAN0_PERIPHERAL_CLKSRC': 'External','PCW_CAN1_PERIPHERAL_CLKSRC': 'External','PCW_TPIU_PERIPHERAL_CLKSRC': 'External','PCW_TTC0_CLK0_PERIPHERAL_CLKSRC': 'CPU_1X','PCW_TTC0_CLK1_PERIPHERAL_CLKSRC': 'CPU_1X','PCW_TTC0_CLK2_PERIPHERAL_CLKSRC': 'CPU_1X','PCW_TTC1_CLK0_PERIPHERAL_CLKSRC': 'CPU_1X','PCW_TTC1_CLK1_PERIPHERAL_CLKSRC': 'CPU_1X','PCW_TTC1_CLK2_PERIPHERAL_CLKSRC': 'CPU_1X','PCW_WDT_PERIPHERAL_CLKSRC': 'CPU_1X','PCW_DCI_PERIPHERAL_CLKSRC': 'DDR PLL','PCW_PCAP_PERIPHERAL_CLKSRC': 'IO PLL','PCW_USB_RESET_POLARITY': 'Active Low','PCW_ENET_RESET_POLARITY': 'Active Low','PCW_I2C_RESET_POLARITY': 'Active Low','PCW_MIO_0_PULLUP': 'enabled','PCW_MIO_0_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_0_DIRECTION': 'inout','PCW_MIO_0_SLEW': 'slow','PCW_MIO_1_PULLUP': 'enabled','PCW_MIO_1_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_1_DIRECTION': 'out','PCW_MIO_1_SLEW': 'slow','PCW_MIO_2_PULLUP': 'disabled','PCW_MIO_2_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_2_DIRECTION': 'inout','PCW_MIO_2_SLEW': 'slow','PCW_MIO_3_PULLUP': 'disabled','PCW_MIO_3_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_3_DIRECTION': 'inout','PCW_MIO_3_SLEW': 'slow','PCW_MIO_4_PULLUP': 'disabled','PCW_MIO_4_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_4_DIRECTION': 'inout','PCW_MIO_4_SLEW': 'slow','PCW_MIO_5_PULLUP': 'disabled','PCW_MIO_5_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_5_DIRECTION': 'inout','PCW_MIO_5_SLEW': 'slow','PCW_MIO_6_PULLUP': 'disabled','PCW_MIO_6_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_6_DIRECTION': 'out','PCW_MIO_6_SLEW': 'slow','PCW_MIO_7_PULLUP': 'disabled','PCW_MIO_7_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_7_DIRECTION': 'out','PCW_MIO_7_SLEW': 'slow','PCW_MIO_8_PULLUP': 'disabled','PCW_MIO_8_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_8_DIRECTION': 'out','PCW_MIO_8_SLEW': 'slow','PCW_MIO_9_PULLUP': 'enabled','PCW_MIO_9_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_9_DIRECTION': 'out','PCW_MIO_9_SLEW': 'slow','PCW_MIO_10_PULLUP': 'enabled','PCW_MIO_10_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_10_DIRECTION': 'inout','PCW_MIO_10_SLEW': 'slow','PCW_MIO_11_PULLUP': 'enabled','PCW_MIO_11_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_11_DIRECTION': 'inout','PCW_MIO_11_SLEW': 'slow','PCW_MIO_12_PULLUP': 'enabled','PCW_MIO_12_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_12_DIRECTION': 'inout','PCW_MIO_12_SLEW': 'slow','PCW_MIO_13_PULLUP': 'enabled','PCW_MIO_13_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_13_DIRECTION': 'inout','PCW_MIO_13_SLEW': 'slow','PCW_MIO_14_PULLUP': 'enabled','PCW_MIO_14_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_14_DIRECTION': 'in','PCW_MIO_14_SLEW': 'slow','PCW_MIO_15_PULLUP': 'enabled','PCW_MIO_15_IOTYPE': 'LVCMOS 3.3V','PCW_MIO_15_DIRECTION': 'out','PCW_MIO_15_SLEW': 'slow','PCW_MIO_16_PULLUP': 'enabled','PCW_MIO_16_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_16_DIRECTION': 'out','PCW_MIO_16_SLEW': 'slow','PCW_MIO_17_PULLUP': 'enabled','PCW_MIO_17_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_17_DIRECTION': 'out','PCW_MIO_17_SLEW': 'slow','PCW_MIO_18_PULLUP': 'enabled','PCW_MIO_18_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_18_DIRECTION': 'out','PCW_MIO_18_SLEW': 'slow','PCW_MIO_19_PULLUP': 'enabled','PCW_MIO_19_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_19_DIRECTION': 'out','PCW_MIO_19_SLEW': 'slow','PCW_MIO_20_PULLUP': 'enabled','PCW_MIO_20_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_20_DIRECTION': 'out','PCW_MIO_20_SLEW': 'slow','PCW_MIO_21_PULLUP': 'enabled','PCW_MIO_21_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_21_DIRECTION': 'out','PCW_MIO_21_SLEW': 'slow','PCW_MIO_22_PULLUP': 'enabled','PCW_MIO_22_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_22_DIRECTION': 'in','PCW_MIO_22_SLEW': 'slow','PCW_MIO_23_PULLUP': 'enabled','PCW_MIO_23_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_23_DIRECTION': 'in','PCW_MIO_23_SLEW': 'slow','PCW_MIO_24_PULLUP': 'enabled','PCW_MIO_24_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_24_DIRECTION': 'in','PCW_MIO_24_SLEW': 'slow','PCW_MIO_25_PULLUP': 'enabled','PCW_MIO_25_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_25_DIRECTION': 'in','PCW_MIO_25_SLEW': 'slow','PCW_MIO_26_PULLUP': 'enabled','PCW_MIO_26_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_26_DIRECTION': 'in','PCW_MIO_26_SLEW': 'slow','PCW_MIO_27_PULLUP': 'enabled','PCW_MIO_27_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_27_DIRECTION': 'in','PCW_MIO_27_SLEW': 'slow','PCW_MIO_28_PULLUP': 'enabled','PCW_MIO_28_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_28_DIRECTION': 'inout','PCW_MIO_28_SLEW': 'slow','PCW_MIO_29_PULLUP': 'enabled','PCW_MIO_29_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_29_DIRECTION': 'in','PCW_MIO_29_SLEW': 'slow','PCW_MIO_30_PULLUP': 'enabled','PCW_MIO_30_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_30_DIRECTION': 'out','PCW_MIO_30_SLEW': 'slow','PCW_MIO_31_PULLUP': 'enabled','PCW_MIO_31_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_31_DIRECTION': 'in','PCW_MIO_31_SLEW': 'slow','PCW_MIO_32_PULLUP': 'enabled','PCW_MIO_32_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_32_DIRECTION': 'inout','PCW_MIO_32_SLEW': 'slow','PCW_MIO_33_PULLUP': 'enabled','PCW_MIO_33_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_33_DIRECTION': 'inout','PCW_MIO_33_SLEW': 'slow','PCW_MIO_34_PULLUP': 'enabled','PCW_MIO_34_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_34_DIRECTION': 'inout','PCW_MIO_34_SLEW': 'slow','PCW_MIO_35_PULLUP': 'enabled','PCW_MIO_35_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_35_DIRECTION': 'inout','PCW_MIO_35_SLEW': 'slow','PCW_MIO_36_PULLUP': 'enabled','PCW_MIO_36_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_36_DIRECTION': 'in','PCW_MIO_36_SLEW': 'slow','PCW_MIO_37_PULLUP': 'enabled','PCW_MIO_37_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_37_DIRECTION': 'inout','PCW_MIO_37_SLEW': 'slow','PCW_MIO_38_PULLUP': 'enabled','PCW_MIO_38_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_38_DIRECTION': 'inout','PCW_MIO_38_SLEW': 'slow','PCW_MIO_39_PULLUP': 'enabled','PCW_MIO_39_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_39_DIRECTION': 'inout','PCW_MIO_39_SLEW': 'slow','PCW_MIO_40_PULLUP': 'enabled','PCW_MIO_40_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_40_DIRECTION': 'inout','PCW_MIO_40_SLEW': 'slow','PCW_MIO_41_PULLUP': 'enabled','PCW_MIO_41_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_41_DIRECTION': 'inout','PCW_MIO_41_SLEW': 'slow','PCW_MIO_42_PULLUP': 'enabled','PCW_MIO_42_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_42_DIRECTION': 'inout','PCW_MIO_42_SLEW': 'slow','PCW_MIO_43_PULLUP': 'enabled','PCW_MIO_43_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_43_DIRECTION': 'inout','PCW_MIO_43_SLEW': 'slow','PCW_MIO_44_PULLUP': 'enabled','PCW_MIO_44_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_44_DIRECTION': 'inout','PCW_MIO_44_SLEW': 'slow','PCW_MIO_45_PULLUP': 'enabled','PCW_MIO_45_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_45_DIRECTION': 'inout','PCW_MIO_45_SLEW': 'slow','PCW_MIO_46_PULLUP': 'enabled','PCW_MIO_46_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_46_DIRECTION': 'out','PCW_MIO_46_SLEW': 'slow','PCW_MIO_47_PULLUP': 'enabled','PCW_MIO_47_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_47_DIRECTION': 'in','PCW_MIO_47_SLEW': 'slow','PCW_MIO_48_PULLUP': 'enabled','PCW_MIO_48_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_48_DIRECTION': 'inout','PCW_MIO_48_SLEW': 'slow','PCW_MIO_49_PULLUP': 'enabled','PCW_MIO_49_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_49_DIRECTION': 'inout','PCW_MIO_49_SLEW': 'slow','PCW_MIO_50_PULLUP': 'enabled','PCW_MIO_50_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_50_DIRECTION': 'inout','PCW_MIO_50_SLEW': 'slow','PCW_MIO_51_PULLUP': 'enabled','PCW_MIO_51_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_51_DIRECTION': 'inout','PCW_MIO_51_SLEW': 'slow','PCW_MIO_52_PULLUP': 'enabled','PCW_MIO_52_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_52_DIRECTION': 'out','PCW_MIO_52_SLEW': 'slow','PCW_MIO_53_PULLUP': 'enabled','PCW_MIO_53_IOTYPE': 'LVCMOS 1.8V','PCW_MIO_53_DIRECTION': 'inout','PCW_MIO_53_SLEW': 'slow','preset': 'None','PCW_UIPARAM_GENERATE_SUMMARY': 'NA','PCW_MIO_TREE_PERIPHERALS': 'GPIO#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO#Quad SPI Flash#ENET Reset#GPIO#GPIO#GPIO#GPIO#UART 0#UART 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#USB Reset#SD 0#GPIO#GPIO#GPIO#GPIO#Enet 0#Enet 0','PCW_MIO_TREE_SIGNALS': 'gpio[0]#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#gpio[7]#qspi_fbclk#reset#gpio[10]#gpio[11]#gpio[12]#gpio[13]#rx#tx#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#clk#cmd#data[0]#data[1]#data[2]#data[3]#reset#cd#gpio[48]#gpio[49]#gpio[50]#gpio[51]#mdc#mdio','PCW_PS7_SI_REV': 'PRODUCTION','PCW_FPGA_FCLK0_ENABLE': '1','PCW_FPGA_FCLK1_ENABLE': '0','PCW_FPGA_FCLK2_ENABLE': '0','PCW_FPGA_FCLK3_ENABLE': '0','PCW_NOR_SRAM_CS0_T_TR': '1','PCW_NOR_SRAM_CS0_T_PC': '1','PCW_NOR_SRAM_CS0_T_WP': '1','PCW_NOR_SRAM_CS0_T_CEOE': '1','PCW_NOR_SRAM_CS0_T_WC': '11','PCW_NOR_SRAM_CS0_T_RC': '11','PCW_NOR_SRAM_CS0_WE_TIME': '0','PCW_NOR_SRAM_CS1_T_TR': '1','PCW_NOR_SRAM_CS1_T_PC': '1','PCW_NOR_SRAM_CS1_T_WP': '1','PCW_NOR_SRAM_CS1_T_CEOE': '1','PCW_NOR_SRAM_CS1_T_WC': '11','PCW_NOR_SRAM_CS1_T_RC': '11','PCW_NOR_SRAM_CS1_WE_TIME': '0','PCW_NOR_CS0_T_TR': '1','PCW_NOR_CS0_T_PC': '1','PCW_NOR_CS0_T_WP': '1','PCW_NOR_CS0_T_CEOE': '1','PCW_NOR_CS0_T_WC': '11','PCW_NOR_CS0_T_RC': '11','PCW_NOR_CS0_WE_TIME': '0','PCW_NOR_CS1_T_TR': '1','PCW_NOR_CS1_T_PC': '1','PCW_NOR_CS1_T_WP': '1','PCW_NOR_CS1_T_CEOE': '1','PCW_NOR_CS1_T_WC': '11','PCW_NOR_CS1_T_RC': '11','PCW_NOR_CS1_WE_TIME': '0','PCW_NAND_CYCLES_T_RR': '1','PCW_NAND_CYCLES_T_AR': '1','PCW_NAND_CYCLES_T_CLR': '1','PCW_NAND_CYCLES_T_WP': '1','PCW_NAND_CYCLES_T_REA': '1','PCW_NAND_CYCLES_T_WC': '11','PCW_NAND_CYCLES_T_RC': '11','PCW_SMC_CYCLE_T0': 'NA','PCW_SMC_CYCLE_T1': 'NA','PCW_SMC_CYCLE_T2': 'NA','PCW_SMC_CYCLE_T3': 'NA','PCW_SMC_CYCLE_T4': 'NA','PCW_SMC_CYCLE_T5': 'NA','PCW_SMC_CYCLE_T6': 'NA','PCW_PACKAGE_NAME': 'clg400','PCW_PLL_BYPASSMODE_ENABLE': '0','Component_Name': 'pynq_tutorial_processing_system7_0_0','EDK_IPTYPE': 'PERIPHERAL'},'type': 'xilinx.com:ip:processing_system7:5.5','device': ,'driver': pynq.overlay.DefaultIP}}
 
现在，我们只需要知道我们设计中的IP名称。可以通过ip_dict.keys()来找到这些名字。
 
tutorial.ip_dict.keys()
 
dict_keys(['buttons', 'switches', 'leds', 'processing_system7_0'])
 
3 设置IP的handle
 
一旦你知道了IP名称，和分层路径，你就可以设置更方便的handle。
 
bram = tutorial.bram
buttons = tutorial.buttons
switches = tutorial.switches
leds = tutorial.leds
 
4 从按钮和开关中读取
 
一个AXI GPIO IP可以连接到输入或输出引脚，并支持多达两个通道，最高可达32位。AXI GPIO驱动有read()和write()功能，用于基本的MMIO功能。两个通道中的每一个也可以被读取或写入。在以前的设计中，每个AXI GPIO只连接了一组引脚，即只使用了一个通道。现在，我们将做简单的读取，这将默认为第一个通道。
 
下面的代码将从开发板上的按钮中读取一个值并打印结果。下面的单元格可以在按下不同的按钮的情况下多次重复运行，以看到不同的结果。
 
buttons_value = buttons.read()
print("Buttons value is: " + str(buttons_value))
print(type(buttons_value))
buttons_value
 
Buttons value is: 6
6
 
这两个拨码开关可以以类似的方式使用。
 
switches_value = switches.read()
print("Switches value is: " + str(switches_value))
 
Switches value is: 1
 
5 使用LED
 
开关和按钮是输入。如前所述，AXI GPIO可以用来连接到输入或输出。在读取或写入一个双向引脚之前，需要配置方向。
 
在按钮和开关是输入的情况下，AXI GPIO默认被配置为启用输入。
在使用LED之前，AXI GPIO需要被配置成使FPGA引脚为输出。这可以通过向LED或AXI GPIO寄存器的偏移量0x4处写入数值0x0来完成。一个 "0 "可以使单个引脚作为输入，一个 "1 "可以使其作为输出。写0x0可以使所有4个LED引脚作为输出，写0xf（二进制1111）将使4个引脚作为输入。
 
现在将0xf写到偏移量0x4的寄存器中，将LED配置为输出。
 
outputMask = 0x0
tristateRegisterOffset = 0x4leds.write(tristateRegisterOffset, outputMask)
 
6 给LED写值
 
一旦引脚被启用，就可以向AXI GPIO控制器写入一个值。对于通道1，偏移量为0的寄存器被连接到LEDs。
 
dataRegisterOffset = 0x0
led_pattern = 0xaleds.write(dataRegisterOffset, led_pattern)
 
7 综合利用上述内容
 
下面的代码将把按钮的值写到LED上，而开关是 "关闭 "的。在运行电池之前，确保拨码开关处于 "关闭 "位置。
 
按下一个按钮应该导致相应的LED灯打开。
 
while(not switches.read()):leds.write(dataRegisterOffset, buttons.read())
 
BRAM和使用AXI GPIO的更高级方法将在另一个教程中介绍。
                        

                        

本文来自互联网用户投稿，文章观点仅代表作者本人，不代表本站立场，不承担相关法律责任。如若转载，请注明出处。 如若内容造成侵权/违法违规/事实不符，请点击【内容举报】进行投诉反馈！

                        
                        

                    

                    



                    

    收藏
    



                    

    

        
        
标签：技术
        
    

    

        
                

            上一篇 >
            定制PYNQ的overlay
        
                

            下一篇 >
            为 Python 和数据工程师提供 FPGA 功能的 PYNQ 项目概述
        
                
    



                    

    

        
        

            
相关文章
        
                

            
Duilib中list控件支持ctrl和shif多行选中的实现
        
                

            
[ICML2015]Batch Normalization:Accelerating Deep Network Training by Reducing Internal Covariate Shif
        
                

            
win10系统 微软输入法 于eclipse ctrl+shif+f冲突间接处理办法
        
                

            
Codeforces Round #259 (Div. 2) B. Little Pony and Sort by Shif
        
                

            
读LDD3，内存映射与DMA--PAGE_SHIF…
        
                

            
VMware虚拟机安装XP【要先分区，再设置BOOT 启动CD，shif+上移】
        
                

            
更换iBus五笔的左与右Shif
        
                

            
sublime ctrl+shif+f 没用解决办法
        
                

            
idea 对 ctrl + z 的撤销 是 ctrl + shif + z
        
                

            
计算机最早的设计师应用于,计算机应用基础选择题doc.doc
        
                

            
win10自带截图神器：Win+Shift+S
        
                

            
Python基础之文件目录操作
        
                

            
python简述目录_Python基础之文件目录操作(示例代码)
        
                

            
tp5 如何做数据采集
        
                

            
任务2-7(服务器字体+阿里巴巴矢量库)
        
                

            
html标签（1)：h1~h6,p,br,pre,hr
        
                

            
TI 电量计介绍与芯片选型指南
        
                

            
几款TI电源芯片简介
        
                

            
TI DSP芯片C2000系列读取FLASH数据
        
                

            
德州仪器(Ti)平台嵌入式开发基础
        
                

            
TI三相电机智能栅极驱动芯片特点分类
        
                

            
省选模拟（12.08） T3 圈圈圈圈圈圈圈圈
        
                

            
Hadoop生态圈技术栈（上）
        
                

            
大数据开发基础入门与项目实战（三）Hadoop核心及生态圈技术栈之6.Impala交互式查询
        
                

            
小猿圈之Linux下Mysql 操作命令
        
                

            
大数据Hadoop生态圈常用面试题
        
                

            
大数据开发基础入门与项目实战（三）Hadoop核心及生态圈技术栈之4.Hive DDL、DQL和数据操作
        
                

            
备战Noip2018模拟赛11（B组）T3 Monogatari 物语
        
                

            
【智能优化算法-圆圈搜索算法】基于圆圈搜索算法Circle Search Algorithm求解单目标优化问题附matlab代码
        
                

            
NYOJ 78 圈水池
        
                

            
递归问题 跑道 汽车 绕圈问题 Python实现
        
                

            
Hadoop生态圈（三）：MapReduce
        
                
    



                    

                
            
        

        
    







    

        
        
        立即
投稿
    
    
    

        
        

            

                
                
                
                
            
        
    

        
        
        

            

            
微信公众账号
            
微信扫一扫加关注
        
    
    
    
        
        返回
顶部