成功移植u-boot-2009.06到qt2410的板子上(Nand Boot)

1.在Makefile中添加(最好在smdk2410后面增加,保持相似的东西放到一起)
qt2410_config : unconfig
 @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
 @$(MKCONFIG) -a $(@:_config=) arm arm920t qt2410 armzone s3c24x0
 @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk

2.在board/和nand_spl/board下建立目录armzone/qt2410,标准的做法是把nand搬移与后面的sdram中运行的代码分离成两部分,而后在Makefile中用cat file1 file2 > file的方式合到一起,当然file1的大小在nand部分就已经处理成了nand boot自动装入的大小----4KB.具体就看Makefile里的脚本吧.

3.在board/armzone/qt2410下将从board/sumsung/smdk2410复制过来的内容做相应的修改

  删除flash相关的,因为是用nand boot,系统中没有使用nor flash.

  把程序和文件中相关的名字都改成qt2410(原来是smdk2410).

4.修改include/configs/qt2410.h(先从smdk2410.h复制),注意要增加和删除一些内容,如flash,env,nand flash等.这里2009.06和2009.03的版本有一些变化,nand的驱动是在driver/mtd/nand/里面了,而且需要把该目录下的Makefile中的一个CONFIG_NAND_S3C2410定义在include/configs/qt2410.h中.否则编译的时候会错,而且nand的驱动也编不进去.

5.在nand_spl/board/armzone/qt2410编写程序,完成将u-boot搬移到sdram中的指定位置,并跳转到该位置运行的程序.注意,这里两部分的程序的TEXT_BASE是不一样的,nand搬移部分是0,而后面的那部分(真正的u-boot)的TEXT_BASE是在SDRAM中的某一位置的,因此要视SDRAM的安排而定,同时nand部分搬移的地址也要而这个地址一致,否则程序是运行不起来的(这个程序不是位置无关的).

因为不知道怎么上传文件,所以把我的patch文件帖到下面:

diff -uNr u-boot-2009.06/board/armzone/qt2410/config.mk u-boot-2009.06-qt2410/board/armzone/qt2410/config.mk
--- u-boot-2009.06/board/armzone/qt2410/config.mk 1970-01-01 08:00:00.000000000 +0800
+++ u-boot-2009.06-qt2410/board/armzone/qt2410/config.mk 2009-06-23 11:05:51.511952000 +0800
@@ -0,0 +1,25 @@
+#
+# ARMZONE QT2410 board with S3C2410X (ARM920T) cpu
+#
+#
+
+#
+# QT2410 has 1 bank of 64 MB DRAM
+#
+# 3000'0000 to 3400'0000
+#
+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
+# optionally with a ramdisk at 3080'0000
+#
+# we load ourself to 33F8'0000
+#
+# download area is 3300'0000
+#
+
+ifeq ($(CONFIG_NAND_SPL),y)
+TEXT_BASE = 0x00000000
+else
+#TEXT_BASE = 0x31F80000
+TEXT_BASE = 0x33F80000
+endif
+
diff -uNr u-boot-2009.06/board/armzone/qt2410/lowlevel_init.S u-boot-2009.06-qt2410/board/armzone/qt2410/lowlevel_init.S
--- u-boot-2009.06/board/armzone/qt2410/lowlevel_init.S 1970-01-01 08:00:00.000000000 +0800
+++ u-boot-2009.06-qt2410/board/armzone/qt2410/lowlevel_init.S 2009-06-23 09:12:41.228322000 +0800
@@ -0,0 +1,167 @@
+/*
+ * Memory Setup stuff - taken from blob memsetup.S
+ *
+ * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
+ *                     Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
+ *
+ * Modified for the Samsung SMDK2410 by
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG,
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include
+#include
+
+
+/* some parameters for the board */
+
+/*
+ *
+ * Taken from linux/arch/arm/boot/compressed/head-s3c2410.S
+ *
+ * Copyright (C) 2002 Samsung Electronics SW.LEE 
+ *
+ */
+
+#define BWSCON 0x48000000
+
+/* BWSCON */
+#define DW8   (0x0)
+#define DW16   (0x1)
+#define DW32   (0x2)
+#define WAIT   (0x1<<2)
+#define UBLB   (0x1<<3)
+
+#define B1_BWSCON  (DW32)
+#define B2_BWSCON  (DW16)
+#define B3_BWSCON  (DW16 + WAIT + UBLB)
+#define B4_BWSCON  (DW16)
+#define B5_BWSCON  (DW16)
+#define B6_BWSCON  (DW32)
+#define B7_BWSCON  (DW32)
+
+/* BANK0CON */
+#define B0_Tacs   0x0 /*  0clk */
+#define B0_Tcos   0x0 /*  0clk */
+#define B0_Tacc   0x7 /* 14clk */
+#define B0_Tcoh   0x0 /*  0clk */
+#define B0_Tah   0x0 /*  0clk */
+#define B0_Tacp   0x0
+#define B0_PMC   0x0 /* normal */
+
+/* BANK1CON */
+#define B1_Tacs   0x0 /*  0clk */
+#define B1_Tcos   0x0 /*  0clk */
+#define B1_Tacc   0x7 /* 14clk */
+#define B1_Tcoh   0x0 /*  0clk */
+#define B1_Tah   0x0 /*  0clk */
+#define B1_Tacp   0x0
+#define B1_PMC   0x0
+
+#define B2_Tacs   0x0
+#define B2_Tcos   0x0
+#define B2_Tacc   0x7
+#define B2_Tcoh   0x0
+#define B2_Tah   0x0
+#define B2_Tacp   0x0
+#define B2_PMC   0x0
+
+#define B3_Tacs   0x0 /*  0clk */
+#define B3_Tcos   0x3 /*  4clk */
+#define B3_Tacc   0x7 /* 14clk */
+#define B3_Tcoh   0x1 /*  1clk */
+#define B3_Tah   0x0 /*  0clk */
+#define B3_Tacp   0x3     /*  6clk */
+#define B3_PMC   0x0 /* normal */
+
+#define B4_Tacs   0x0 /*  0clk */
+#define B4_Tcos   0x0 /*  0clk */
+#define B4_Tacc   0x7 /* 14clk */
+#define B4_Tcoh   0x0 /*  0clk */
+#define B4_Tah   0x0 /*  0clk */
+#define B4_Tacp   0x0
+#define B4_PMC   0x0 /* normal */
+
+#define B5_Tacs   0x0 /*  0clk */
+#define B5_Tcos   0x0 /*  0clk */
+#define B5_Tacc   0x7 /* 14clk */
+#define B5_Tcoh   0x0 /*  0clk */
+#define B5_Tah   0x0 /*  0clk */
+#define B5_Tacp   0x0
+#define B5_PMC   0x0 /* normal */
+
+#define B6_MT   0x3 /* SDRAM */
+#define B6_Trcd   0x1
+#define B6_SCAN   0x1 /* 9bit */
+
+#define B7_MT   0x3 /* SDRAM */
+#define B7_Trcd   0x1 /* 3clk */
+#define B7_SCAN   0x1 /* 9bit */
+
+/* REFRESH parameter */
+#define REFEN   0x1 /* Refresh enable */
+#define TREFMD   0x0 /* CBR(CAS before RAS)/Auto refresh */
+#define Trp   0x0 /* 2clk */
+#define Trc   0x3 /* 7clk */
+#define Tchr   0x2 /* 3clk */
+#define REFCNT   1113 /* period=15.6us, HCLK=60Mhz, (2048+1-15.6*60) */
+/**************************************/
+
+_TEXT_BASE:
+ .word TEXT_BASE
+
+.globl lowlevel_init
+lowlevel_init:
+ /* memory control configuration */
+ /* make r0 relative the current location so that it */
+ /* reads SMRDATA out of FLASH rather than memory ! */
+ ldr     r0, =SMRDATA
+ ldr r1, _TEXT_BASE
+ sub r0, r0, r1
+ ldr r1, =BWSCON /* Bus Width Status Controller */
+ add     r2, r0, #13*4
+0:
+ ldr     r3, [r0], #4
+ str     r3, [r1], #4
+ cmp     r2, r0
+ bne     0b
+
+ /* everything is fine now */
+ mov pc, lr
+
+ .ltorg
+/* the literal pools origin */
+
+SMRDATA:
+    .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
+    .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
+    .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
+    .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
+    .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
+    .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
+    .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
+    .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
+    .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
+    .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
+    .word 0x32
+    .word 0x30
+    .word 0x30
diff -uNr u-boot-2009.06/board/armzone/qt2410/Makefile u-boot-2009.06-qt2410/board/armzone/qt2410/Makefile
--- u-boot-2009.06/board/armzone/qt2410/Makefile 1970-01-01 08:00:00.000000000 +0800
+++ u-boot-2009.06-qt2410/board/armzone/qt2410/Makefile 2009-06-23 10:02:01.143317000 +0800
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := qt2410.o
+SOBJS := lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff -uNr u-boot-2009.06/board/armzone/qt2410/qt2410.c u-boot-2009.06-qt2410/board/armzone/qt2410/qt2410.c
--- u-boot-2009.06/board/armzone/qt2410/qt2410.c 1970-01-01 08:00:00.000000000 +0800
+++ u-boot-2009.06-qt2410/board/armzone/qt2410/qt2410.c 2009-06-23 12:16:22.215958000 +0800
@@ -0,0 +1,142 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH
+ * Marius Groeger
+ *
+ * (C) Copyright 2002
+ * David Mueller, ELSOFT AG,
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define FCLK_SPEED 1
+
+#if FCLK_SPEED==0  /* Fout = 203MHz, Fin = 12MHz for Audio */
+#define M_MDIV 0xC3
+#define M_PDIV 0x4
+#define M_SDIV 0x1
+#elif FCLK_SPEED==1  /* Fout = 202.8MHz */
+#define M_MDIV 0xA1
+#define M_PDIV 0x3
+#define M_SDIV 0x1
+#endif
+
+#define USB_CLOCK 1
+
+#if USB_CLOCK==0
+#define U_M_MDIV 0xA1
+#define U_M_PDIV 0x3
+#define U_M_SDIV 0x1
+#elif USB_CLOCK==1
+#define U_M_MDIV 0x48
+#define U_M_PDIV 0x3
+#define U_M_SDIV 0x2
+#endif
+
+static inline void delay (unsigned long loops)
+{
+ __asm__ volatile ("1:/n"
+   "subs %0, %1, #1/n"
+   "bne 1b"

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