添加pwm7的参数diff --git a/lichee/linux-3.10/arch/arm/boot/dts/sun8iw11p1.dtsi b/lichee/linux-3.10/arch/arm/boot/dts/sun8iw11p1.dtsi
index db8d122..102d0bd 100755
--- a/lichee/linux-3.10/arch/arm/boot/dts/sun8iw11p1.dtsi
+++ b/lichee/linux-3.10/arch/arm/boot/dts/sun8iw11p1.dtsi
@@ -1254,9 +1254,9 @@pwm: pwm@01c23400 {compatible = "allwinner,sunxi-pwm";reg = <0x0 0x01c23400 0x0 0x154>;
- pwm-number = ;
+ pwm-number = <&pwm0>;pwm-base = <0x0>;
- pwms = <&pwm0>, <&pwm1>;
+ pwms = <&pwm0>, <&pwm1>,<&pwm7>;};pwm0: pwm0@01c23400 {
@@ -1437,6 +1437,96 @@reg_active_width = <0x10>;};+ pwm7: pwm7@01c23400 {
+ compatible = "allwinner,sunxi-pwm7";
+ pinctrl-names = "active", "sleep";
+ reg_base = <0x01c23400>;
+ reg_peci_offset = <0x00>;
+ reg_peci_shift = <0x07>;
+ reg_peci_width = <0x01>;
+
+ reg_pis_offset = <0x04>;
+ reg_pis_shift = <0x07>;
+ reg_pis_width = <0x01>;
+
+ reg_crie_offset = <0x10>;
+ reg_crie_shift = <0x07>;
+ reg_crie_width = <0x01>;
+
+ reg_cfie_offset = <0x10>;
+ reg_cfie_shift = <0x01>;
+ reg_cfie_width = <0x01>;
+
+ reg_cris_offset = <0x14>;
+ reg_cris_shift = <0x07>;
+ reg_cris_width = <0x01>;
+
+ reg_cfis_offset = <0x14>;
+ reg_cfis_shift = <0x01>;
+ reg_cfis_width = <0x01>;
+
+ reg_clk_src_offset = <0x20>;
+ reg_clk_src_shift = <0x07>;
+ reg_clk_src_width = <0x02>;
+
+ reg_bypass_offset = <0x20>;
+ reg_bypass_shift = <0x05>;
+ reg_bypass_width = <0x01>;
+
+ reg_clk_gating_offset = <0x2c>;
+ reg_clk_gating_shift = <0x04>;
+ reg_clk_gating_width = <0x01>;
+
+ reg_clk_div_m_offset = <0x2c>;
+ reg_clk_div_m_shift = <0x00>;
+ reg_clk_div_m_width = <0x04>;
+
+ reg_pdzintv_offset = <0x3c>;
+ reg_pdzintv_shift = <0x08>;
+ reg_pdzintv_width = <0x08>;
+
+ reg_dz_en_offset = <0x3c>;
+ reg_dz_en_shift = <0x00>;
+ reg_dz_en_width = <0x01>;
+
+ reg_enable_offset = <0x40>;
+ reg_enable_shift = <0x07>;
+ reg_enable_width = <0x01>;
+
+ reg_cap_en_offset = <0x44>;
+ reg_cap_en_shift = <0x07>;
+ reg_cap_en_width = <0x01>;
+
+ reg_period_rdy_offset = <0x140>;
+ reg_period_rdy_shift = <0x0b>;
+ reg_period_rdy_width = <0x01>;
+
+ reg_pul_start_offset = <0x140>;
+ reg_pul_start_shift = <0x0a>;
+ reg_pul_start_width = <0x01>;
+
+ reg_mode_offset = <0x140>;
+ reg_mode_shift = <0x09>;
+ reg_mode_width = <0x01>;
+
+ reg_act_sta_offset = <0x140>;
+ reg_act_sta_shift = <0x08>;
+ reg_act_sta_width = <0x01>;
+
+ reg_prescal_offset = <0x140>;
+ reg_prescal_shift = <0x00>;
+ reg_prescal_width = <0x08>;
+
+ reg_entire_offset = <0x144>;
+ reg_entire_shift = <0x10>;
+ reg_entire_width = <0x10>;
+
+ reg_active_offset = <0x144>;
+ reg_active_shift = <0x00>;
+ reg_active_width = <0x10>;
+ };
+
+
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